🧩 Tile Assembly

Tile Assembly is the payoff node at the end of the FiL tiled-upscale pipeline. You upscale an image, slice it into tiles, run your per-tile processing (a diffusion pass, a model upscaler, ControlNet Tile - whatever your VRAM lets you do piece by piece), and then you have a pile of processed tiles that needs to become one image again. This node stitches them back together, and it does it with feathered seams so the overlaps don't show.

It's deliberately small. Two inputs, one output. tiles is the batch of processed tile images - and the README is emphatic about the ordering: same order and count as the tiles output that produced layout. layout is a FilTileLayout object from either FiL Upscaler Advanced or Upscaler Simple, and it carries the exact per-tile rectangles - not just the tile size, but where each one lives. That layout is what tells the assembler where the real overlap zones are, so it can feather across them instead of hard-joining at the edges.

How the feathering works

The tiles were cropped with real overlap (the grid step is tile − overlap), which means each processed tile carries redundant pixels along its edges. If you simply pasted them side by side you'd get visible seams - the same content rendered twice, with slightly different denoising, colliding at a hard boundary. The assembler instead blends across the overlap zones, weighting each tile's contribution toward its own center and fading toward its edges. Overlap zones get a weighted average of two renders; the result is one continuous image instead of a checkerboard of disagreements.

It also doubles as a preview node - it's flagged as an output node, so the assembled result displays right on the node rather than requiring a separate Preview Image downstream. One less node in the graph, and the whole pipeline reads nicely left to right.

The one mistake that breaks everything

Mismatched layout and tiles. If you change the grid between the upscaler and the assembler - different tile_size, a different tile_overlap, a different manual_tile_cols - or you feed tiles from one run into a layout from another, the rectangles won't line up and you'll get misaligned seams or outright garbage. The pipeline is designed to be: one upscaler run → process the batch → feed the same layout back. Don't regenerate the layout after processing; keep it on a wire from the upscaler straight to the assembler.

Beyond that, the honest expectations: this node doesn't fix tiles that diverged. If your per-tile diffusion pass drifted and the tiles no longer agree on colors or structure, feathering blends the disagreement into soft blur rather than a crisp seam - the fix is upstream (a tile ControlNet, lower denoise per tile, better overlap). Feathering is a cosmetic discipline, not a reconstruction miracle.

This is the node that closes the loop on the whole tiled-upscale pattern - the same pattern the community has run since Ultimate SD Upscale and Tiled Diffusion: arbitrary output size on limited VRAM, per-tile processing, then a faithful stitch. The FiL version adds the discipline of a real layout object and real overlap math, which is what keeps the seams from showing.

Install is pack-standard: ComfyUI Manager search FiL_Design_ImageMind, or clone + pip install -r requirements.txt + restart. ComfyUI 0.3.60+ required for the V3 node API.